RTC Magazine

Wireless Sensor Network Offers Internet-Like Scalability

A wireless sensor network (WSN) is able to address large-scale enterprise applications by forming large, resilient IP-based WSNs and letting users centrally manage collections of those WSNs as an integral part of the enterprise IP infrastructure. PhyNet from Arch Rock is an IP-based platform that implements a tiered WSN architecture and eliminates the need to co-locate individual sensor networks with the server-based functions that control them. It accomplishes this by placing a scalable internetworking tier—the first “WSN router”—between them. Sensor applications can now reside half a world away, across a corporate campus or in the next room, communicating with any number of WSNs across local- or wide-area IP networks.

The PhyNet platform’s tiered architecture includes three major components: the PhyNet Server, the router and the IPserial Node. The PhyNet Server translates embedded sensor applications into Web services and provides a suite of Web-based applications for the setup, diagnostics and management of multiple WSNs. Users can view sensor data and events from all WSNs; generate a deployment map; discover, register, move and configure nodes; enable/disable sensors or show their battery status; graphically display performance statistics; and set reporting intervals, thresholds and alerts.

The PhyNet Router is an embedded networking device connecting 6LoWPAN mesh networks via Wi-Fi and Ethernet interfaces to diverse WAN links, which allows the physical separation of sensor node deployments and their server-hosted applications. The router establishes an Internetworking backbone by forming and adaptively configuring the routing table to reach all nodes in a WSN mesh. Supporting native IPv6 to the sensor nodes, it handles IPv4-to-IPv6 protocol translation, provides packet encryption/decryption and authentication, and supports over-the-air (OTA) programming and provisioning of nodes.

Arch Rock’s new IPserial Node allows WSN users to connect to smart digital sensors such as digital meters and thermometers, weather stations, biometric equipment; to a broad set of instruments and data loggers with RS-232 and RS-485 interfaces; and to sensing and control systems that use legacy wired buses (e.g., ModBus) equipped with serial interfaces. This node lets users take advantage of a broad array of highly precise, small-footprint digital sensors that can be mixed and matched with existing analog sensor nodes using expansion ports to form a highly diverse WSN.

Within a given WSN, as the number of sensors and the collected data increase, users can deploy several PhyNet Routers—the equivalent of having multiple edge routers aggregating a set of wired local networks. With dynamic routing and full redundancy across all PhyNet Routers deployed at the WSN edge, a node will dynamically find the best path to its destination and automatically circumvent any breaks in connectivity due to changes in the radio environment or in neighboring nodes. An entry-level system priced at $7,995 includes one PhyNet Server, two PhyNet Routers, 10 IPsensor Nodes (analog) and two IPserial Nodes. The system can be scaled through the addition of individual components.

Arch Rock,
San Francisco, CA.
(415) 692-0828.
[www.archrock].com.

Rugged 6U VXS/VITA41 DSP Board Teams FPGAs with DSPs

A rugged, hybrid VXS/VITA 41 signal processing board features two Altera Stratix II GX FPGAs (2SGX90 or 130), two processing clusters consisting of two ADSP-TS201S TigerSHARC DSPs from Analog Devices, and up to 3 Gbytes of DDR2 SDRAM memory. The conduction-cooled GT-6U-VME (GTV6) from BittWare is optimized for high-end, multiprocessing applications, while also providing flexibility for future adaptability and for existing and future military applications that require embedded signal processing in a VXS/VITA 41 form factor. With 5 Gbytes/s of simultaneous external input and output, 14.4 GFLOPS of floating point processing power, and the ability to upgrade and adapt the design without any hardware modifications, the GTV6 provides a solution for the highly complex world of signal processing.

The GTV6 implements a dual BittWare ATLANTiS framework to interface between the FPGAs and DSPs. Implemented in each Altera Stratix II GX FPGA, ATLANTiS seamlessly integrates the FPGA and DSP processing, allocating the I/O bandwidth among the individual processing units, while also handling all on- and off-board data routing. The dual ATLANTiS framework provides 5 Gbytes/s of continuous throughput and leaves ample FPGA resources for additional processing.

At the heart of the GTV6 are two state-of-the-art Altera Stratix II GX FPGAs, each containing up to 132,540 equivalent LEs, 6.7 Mbits of RAM, 252 embedded 18x18 multipliers, 63 DSP blocks and 8 PLLs. Each FPGA provides pre-, post-, or co-processing to complement one TigerSHARC processing cluster, while also enabling seamless routing of the TigerSHARC I/O at a rate of over 2 Gbytes/s via BittWare’s ATLANTiS framework.

The GTV6 features two clusters of two ADSP-TS201S TigerSHARC DSPs, which are interconnected by a 64-bit cluster bus running at 83.3 MHz. The ADSP-TS201 processor operates at up to 600 MHz, providing 3.6 GFLOPS of peak processing power. Because of its superscalar architecture, the ADSP-TS201 is also efficient at fixed-point processing, with each DSP supporting 14.4 BOPS of processing. Along with 24 Mbits of on-chip RAM, each DSP also boasts four high-speed LVDS link ports. BittWare’s FINe bridge chip supports a 32-bit, 66 MHz PCI interface as well as Gigabit Ethernet, giving control plane access to the DSPs, flash and FPGA control registers via the VME bus (using the Tundra Tsi148 PCI-VME bridge) or GigE. The FINe also allows the DSPs low-overhead access to the host, flash and Ethernet.

BittWare offers comprehensive software support for the GTV6. The BittWorks software tools provide host interface libraries and a wide variety of diagnostic utilities and configuration tools, and BittWare’s TS-Lib optimized libraries for TigerSHARC. BittWare’s FPGA Developers Kit is also available with modules for ATLANTiS framework (I/O, routing and processing), memory interfacing and DMAs. Many third-party tools are also available to support BittWare’s hybrid embedded boards, including Altera’s Quartus II FPGA design flow tool and SOPC builder system-level design tool, and Analog Devices’ VisualDSP++. Real-time operating systems available include Analog Devices’ VisualDSP Kernel (VDK) and Enea’s OSEck RTOS.

BittWare,
Concord, NH.
(603) 226-0404.
[www.bittware.com].