TECHNOLOGY IN CONTEXT
Mezzanines in communication
Mezzanine Board Strategies for Communications
Mezzanines offer an excellent solution to local high-performance signal acquisition and preprocessing, saving costly processor resources. With FPGAs, they can be reconfigured to meet new communications standards extending system life cycle.
RODGER H. HOSKING, PENTEK
Few embedded system applications encompass a more diverse range of signal frequencies, signaling schemes, numbers of channels, data rates and signal processing algorithms than communications systems. Apart from this extreme diversity, communications systems must now handle wider signal bandwidths to meet the needs of new complex modulation schemes and higher data rates to support large numbers of these channels.
System integrators faced with the task of delivering custom communication systems using COTS board-level products have traditionally relied on mezzanine boards (or daughter cards) for modular and flexible interfaces.
But new technologies and new mezzanine standards have cast mezzanines for communication systems into complex and critical roles previously handled by other full-size boards in the system. By cutting costs and boosting performance, choosing the right mezzanine boards now becomes a much more significant part of successful system design.
Communication System Basics
The receiver section of a modern communication system typically starts with an analog RF stage that amplifies and down-converts the antenna signal to an intermediate frequency (IF), as shown in Figure 1. This IF signal can then be digitized by a wide range of monolithic A/D converters capable of 14- or 16-bit accuracy and sampling rates of 100 MHz and higher. The IF signal bandwidth usually covers the entire span of the particular communication band and may contain many different carriers, each at its own frequency.

Extracting multiple signal channels from this digitized IF band requires digital down-conversion (DDC). This process starts with a digital local oscillator that produces samples of a sine wave set to the carrier frequency. The samples from the A/D are then mixed with the oscillator samples using a digital multiplier. This translates the carrier signal down to baseband and produces a complex (I+Q) digital signal with upper and lower sidebands centered at 0 Hz. A digital low pass filter set for the signal bandwidth removes adjacent channel signals, leaving only the channel of interest. Because the bandwidth of the filtered output has been reduced, an output decimator drops the sampling rate commensurate with that bandwidth.
Finally, depending on the type of transmission, additional processing steps for demodulation, decoding and decryption are needed to recover the receive channel data. All of the digital signal processing steps shown in the top half of Figure 1 to the right of the A/D must be repeated for each channel.
On the transmit side, the signal processing steps are exactly reversed, as shown in the lower half of Figure 1. Transmit channel data must first be processed with the appropriate modulation, encoding and encryption to make it compatible for the transmission channel protocols. The digital up-conversion (DUC) stage then follows. Here, the digital sample stream signal enters an interpolation filter, which preserves the frequency characteristics of the signal, but boosts the sampling rate to match the sample rate of the digital mixer and local oscillator. These stages up-convert the baseband transmit signal to the IF frequency. A D/A converter produces an analog IF signal, which is fed into the analog RF transmitter section to drive the antenna. All of the signal processing steps to the left of the D/A must be repeated for each channel.
Because the A/D and D/A converters generate and require sampled data streams at very high sample rates, general-purpose programmable processors cannot reasonably handle these substantial DSP tasks. Instead, designers often choose ASICs targeted for the specific receive and transmit requirements of the signal channel. However, because of the variety of communication signal types and frequency characteristics, the signal processing tasks tend to be quite unique for each system. As a result, there is no single standard ASIC available to handle a wide range of applications.
Emerging Mezzanine Standards
Successful adoption of mezzanines springs directly from standardization of mezzanine architectures. Standards create win-win situations by assuring customers of multi-vendor availability and competitive prices, and assuring board vendors of a viable marketplace worthy of investment in product development. Several popular mezzanine standards emerging during the last few years have hit home runs. Topping the list is the ubiquitous PCI Mezzanine Card (PMC) and its unfolding series of performance enhancements.

Kontron
Interphase