RTC Magazine

System design is all about the art of the possible. After the governments of the USA and other countries mandated the use of COTS in the early 1990s, one of the first tasks was to develop VME-based COTS components suitable for upgrading large sonar systems on existing naval vessels. The requirements of such systems are complex because they generally involve a large number of analog channels, high sample rates, complex interfacing and data formatting, large computing power for beam forming, filtering and demodulation and a high data transfer rate.

Data flow management was a significant challenge in early COTS systems due to the extremely limited bandwidth of the VME backplane. To overcome this barrier, a number of VME board vendors—led by ICS Sensor Processing, now part of GE Fanuc Embedded Systems—pioneered a unidirectional data flow architecture called the Front Panel Data Port, or FPDP. This is a 32-bit synchronous port that, in its initial version, offered a sustained throughput of 160 Mbytes/s. It is busable with multi-drop capability so that blocks of data can be either added to, or extracted from, a frame of FPDP data on a timeslot basis. Connection to the port is made via an 80-way ribbon cable connector located on the front panel of each board.

Dedicated DSP devices were the optimum choice for sonar signal processing since they easily outperformed the general-purpose processors of that era. By optimizing the DSP board architecture for sonar operations (such as FIR filtering/decimation, complex demodulation, beam forming and replica correlation) over 600 MOPS (million operations per second) sustained computing power could be shoehorned into a single 6U VME slot. The provision of two FPDP ports per DSP board, for separate input and output data paths, meant that an effective data throughput of 2.5 Gbits/s could be supported.

Figure 1 shows an active-passive hull sonar receive processing system developed using a set of COTS products based on these techniques. The system digitized 216 analog hydrophone inputs at 18 kHz sample rate by using seven 32-channel, 24-bit ADC boards. Beams could be formed using any 72 elements and three DSP cards could produce over 36 simultaneous beam outputs. Two further DSP cards provided low pass filtering of passive beams and demodulation of active beams. An optional single DAC card provided up to 32 analog beam outputs. Buffer cards were used to route beam data to the sonar post-processor either via VME64 or FPDP interface.

Impact of Technology Advances

The spectacular growth of the personal computer market over the last decade has had a profound influence on sensor processing system design since it has been a major driving force in semiconductor technology improvement. This has driven down component costs and also led to significant improvements in processor architecture and speed, signal interface data rates and data acquisition silicon performance.

Consumer interest in high-speed serial interfaces started with the introduction of FireWire and USB ports to provide a low-cost, high-speed and flexible way to attach computer peripherals. At around the same time, low voltage differential signaling (LVDS) technology was originally proposed as a “future-proof” means of providing inter-device communication because its small amplitude and low DC offset could cope with anticipated future reductions in CMOS supply rails.

After more than a decade of development, high-speed serial point-to-point interfaces based on LVDS techniques have finally emerged as a viable alternative to traditional parallel bus standards. High-speed serial standards such as PCI Express and Gigabit Ethernet have already been implemented in PC products thanks to highly integrated custom chips. However, the much lower volume military embedded market has only been able to exploit the benefits of high-speed point-to-point communication since serial fabric bridge silicon and sophisticated FPGA core and I/O functions have only quite recently become available.

Acoustic System Design

COTS-based sonar systems are normally operated in a benign environment and so the current generation designs adopted PC-based technology and a more distributed architecture in order to minimize cost while maintaining or improving performance.

Hydrophone data acquisition today uses a synchronized array of multi-channel ADC boards, controlled by a local CPU via a PCI-based backplane and housed in a rack-mounted 19” chassis. The digitized datastream is then transported via high-speed links to a separate data processing engine, typically a networked array of high-end PC servers.

Applying state-of-the-art technology to the multi-channel data acquisition function has led to the creation of a new concept: the acoustic acquisition server, a high-performance networked system component that radically reduces sonar system size and cost by packing up to 192 analog I/O channels into a single 19” rack-mounted, 1U enclosure. The server uses Gigabit Ethernet as an LVDS high-speed serial point-to-point interface to transfer two-way data and control information to or from a remote system controller, as illustrated in Figure 2.