SOLUTIONS ENGINEERING
VME 25th Anniversary
VPX and VPX-REDI Standards Coming on Strong
The latest set of standards expected from the VITA Standards Organization (VSO) will address the support of robust serial interconnects over the backplane along with ruggedized specs that provide for a selection of cooling methods.
STEWART DEWAR, VITA 46 WORKING GROUP
The VPX and VPX-REDI standards are currently a major focus area for the VITA Standards Organization (VSO). VPX, formally referred to as VITA 46, offers 6U and 3U board formats with a modern high-performance connector set that is capable of supporting today’s plethora of high-speed fabric interfaces such as Serial RapidIO, PCI Express, 10 Gigabit Ethernet and others. While VPX maintains the very familiar mechanical and dimensional aspects of 6U VME and 3U CompactPCI such as the standard 0.8” pitch, VPX-REDI, formally known as VITA 48, offers extended mechanical configurations designed to support higher functional density. Being targeted primarily for harsh-environment embedded applications, VPX and VPX-REDI go hand in hand to enable defense system integrators to fully exploit today’s advanced component technology.

Figure 1 illustrates the suite of documents that together make up the VPX standard. As with other backplane standards, such as AdvancedTCA (ATCA), VPX uses the concept of a base specification to define the common elements and then a range of subsidiary specifications, commonly called “dot specifications,” after the convention in which they are numbered. The base specification for VPX is VITA 46.0, “46” being derived from the number of the VSO working group developing the VPX standard. Figure 2 shows a representative VPX module in a conduction-cooled format.

VITA 46.0 defines the basic mechanical and electrical underpinnings of VPX:
-6U and 3U board sizes and mechanical details based heavily on IEEE 1101.1 and IEEE 1101.10 for air-cooled cards and IEEE 1101.2 for conduction-cooled cards—all on a 0.8” pitch
-the use of the MultiGig 7-row RT2 connector, rated for signaling rates of up to 6.5 Gbaud
-the use of a mechanically robust alignment and keying system—the alignment aspect brings the payload card into alignment with the backplane slot before the connectors mate, while the keying aspect prevents cards from being inserted into an incorrect slot accidentally
- definition of voltages and current
capacities of the power rails
- utility signals such as geographical addressing, SYSRESET*, Reference Clock and JTAG
- signals allocated for a system management bus implementation
The VITA 46.0 specification provides a highly capable baseline for module implementations. Some notable aspects of the VPX connector system as implemented on a 6U module include:
- A total of 707 non-power electrical contacts
- A total of 464 signal contacts (non-power, non-ground), providing for:
- 64 signals implemented as 32 high-speed differential pairs for core fabric
- 104 signals used for a full VME64 implementation
- 268 for general-purpose user I/O including 128 high-speed differential pairs
- 28 for system utilities (reset, geographical addressing, etc.) and spares
- Each high-speed differential pair is rated up to 6.5 Gbaud
The large number of high-speed differential pairs supported by VPX modules allows for a rich complement of backplane I/O including: multiple ports of high-speed fabrics such as PCI Express, Serial RapidIO, 10GbE XAUI and InfiniBand; mass storage interfaces such as Serial ATA and high-speed digital video; and special-purpose interconnects such as RocketIO from Xilinx FPGAs.
The VPX specification hierarchy presented in Figure 1 illustrates a range of optional elements for a VPX module, one or more of which need to be implemented to provide a functional module. For 6U VPX modules an implementation of a full A32:D32 VME64 bus is defined within the VITA 46.1 specification. Such an implementation enables a VPX module to provide the performance benefits of a modern fabric-connected module while still maintaining the ability to interface to standard VME modules, assuming that an appropriate hybrid backplane is provided. This eases the transition to VPX by allowing previous investments in VME modules to be leveraged for new systems.
Integral to the working concept of VPX is what is referred to as the core fabric interface. A 6U VPX module is specified to have 4 core fabric ports, each port having 4 lanes (a Tx and Rx pair) in each direction. The allocation of 4 lanes per port fits naturally with Serial RapidIO, 10GbE XAUI and 4-lane implementations of PCI Express and InfiniBand. By provisioning for four (4) ports of fabric, a VPX module provides enough fabric connectivity to implement a large range of systems without the need for a dedicated switch slot—an important consideration for space, weight and power (SWAP)-sensitive systems often associated with military/aerospace applications.

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