RTC Magazine

As processing capability continues to grow, signal processing systems are using ever larger amounts of sensor data—in resolution, bandwidth and number of channels—to perform their functions. Data acquisition and recording systems are required that can test and support these advanced signal processors’ capabilities. Fortunately, the same tools and technologies that enable faster signal processing—switched fabric interconnect and FPGA-based processing—can also be used to implement advanced data acquisition systems for a wide range of applications, including radar.

Using a Network Model

The primary mission of a data acquisition system is to acquire and store data, and lots of it. The first design parameter to consider is the amount of data that needs to be stored. If the application can be implemented with a single channel to disk, typically up to 200 Mbytes/s, the system can use either embedded storage technology or a PC-based data recorder. If the application requires multiple channels to disk, from 200 Mbytes/s up to several Gbytes/s, the system will typically use a switched fabric interconnect to provide both scalability and modularity.

A variety of switched fabrics are available with off-the-shelf support for modular data recorders. Many legacy radar data acquisition systems use RACE++, which offers up to 533 Mbytes/s per 6U VME slot. Newer systems being developed today use VITA 41 (VXS) technology to scale up to 2.5 Gbytes/s per 6U slot. VXS systems can use fabrics such as PCI Express or Serial RapidIO, or point-to-point links based on the Xilinx Aurora protocol. The choice of protocol depends on the interoperability requirements within the system and the complexity of the endpoint solution, which is typically implemented in an FPGA on each VXS card.

One benefit of using a switched fabric is the built-in support for a network model for the system as a whole. The system can be viewed as a loosely coupled set of processing nodes, each with a PowerPC processor, local memory, I/O module site and bridge to the fabric (Figure 1).

Nodes can be configured as either storage or I/O nodes, depending on the type of I/O module installed. Because each I/O module has its own dedicated processor, the software model is very simple. If a Fibre Channel module is installed, the node acts as a storage server, responding to client requests through the fabric network. Alternately, if an I/O module is installed, the node acts as both an autonomous I/O server and a storage client, managing its own I/O module and requesting storage to disk through the fabric network.

High-Speed Fiber Optic Data Transfer

In many radar applications, the sensor data being recorded is converted from analog to digital outside the recorder and is transferred using high-speed fiber optic interfaces. This approach makes it easy to insert a data recorder into the system without degrading the signal integrity of the data being acquired. The data recorder typically implements a copy mode that re-broadcasts the input data, allowing the recorder to be inserted between the sensor and its signal processor without interrupting the data flow.

The most common format for high-speed fiber optic transmission is Serial FPDP, or ANSI/VITA 17.1. Serial FPDP supports 1.062, 2.125 or 2.5 Gbit/s physical links, providing data rates of up to 247 Mbytes/s per fiber. Serial FPDP is designed to be a simple, low-latency protocol, making it well suited for FPGA-based implementations.

In many radar data acquisition systems, the building block that provides high-speed fiber interfaces is a PMC module, such as TEK Microsystems’ JazzFiber (Figure 2). Each of these modules provides four independent fiber optic interfaces connected to an onboard FPGA. The module also includes two banks of DDR buffer memory to support wirespeed buffering of all four data channels. When installed on a PCI-X carrier, the PMC module supports full throughput, 1 Gbyte/s transfers between all four channels and the host.

The FPGA can be used to implement a wide range of protocols, including Serial FPDP, Fibre Channel and Gigabit Ethernet, allowing the same module to support different types of interfaces through FPGA reconfiguration. Each processing chain is independent in the FPGA, allowing a single module to support a mix of protocols if required (Figure 3).