RTC Magazine

High-performance embedded systems have always tried to balance the need for raw processing power with the ability to move data—at high speed—in and out of the system. The VITA 42 XMC standard is directly targeted at the requirements of high-performance systems in a rugged, deployed environment. Based on the successful PMC standard, XMC adds up to two high-speed serial connectors (designated J15 and J16) that can be used for switched fabric solutions as well as point-to-point connections between I/O modules and carrier cards. XMC leverages the availability of merchant silicon solutions for fabric endpoints and switches while maintaining the form-factor and mechanical characteristics to support operations in severe environments.

The XMC standard defines a layered architecture, with the base standard—VITA 42.0 —defining the mechanical, power and utility interfaces while several protocol standards map specific switched fabric interfaces into the XMC architecture. The current set of protocol standards are shown in Table 1, along with the throughput for interfaces with one or both XMC connectors.

The XMC architecture has many features in common with another standard, the Advanced Mezzanine Card, or AMC, being developed by PICMG as a part of the AdvancedTCA ecosystem. Both XMC and AMC support direct connection to switched fabrics and leverage the growing number of endpoint solutions available from silicon providers. While the architectures are similar, the mechanical features are quite different due to the markets addressed by the two standards. AMC modules are designed to meet the needs of the high-availability telecom market, which requires that modules be hot-swappable without powering down the system or removing the carrier card from the chassis. This design goal resulted in selection of a card-edge-type connector that meets the requirements of the telecom environment but is unsuitable for the shock, vibration and humidity requirements of a deployed military application. XMC modules, on the other hand, have no hot-swap requirement and use a traditional stacking connector between the mezzanine and carrier that has been characterized for rugged environments.

The evolution of the XMC ecosystem has gone through several stages based on the availability of switched fabric endpoints. The initial wave of activity was based on Parallel RapidIO, or VITA 42.1, driven by the availability of Parallel RapidIO processors from Freescale and switches from Mercury and Tundra. The next wave of activity leveraged FPGA technology to implement PCI Express (VITA 42.3) and Serial RapidIO (VITA 42.2) endpoints, both of which can be implemented using a common hardware platform and FPGA IP cores. Unlike the Parallel RapidIO and HyperTransport (VITA 42.4) standards, serial switched fabrics such as PCI Express and Serial RapidIO share a common physical interface, allowing the development of fabric-agnostic hardware products using FPGAs at one or both ends of the link. The ability to “hedge” the fabric wars has made it easier to move forward with XMC products without having to choose a specific fabric, as long as the application supports the power and cost tradeoffs of an FPGA-based design. An example block diagram of an FPGA-based XMC module is shown in Figure 1.

As the base of FPGA-based products reached critical mass, application developers realized that the FPGA could often be better utilized as a signal or protocol processing resource rather than using a large fraction of the available gates for a fabric endpoint. This resulted in applications being developed based on the Xilinx Aurora protocol as a lightweight, point-to-point link between XMC modules and carriers, or between different carriers on a VXS backplane. Although Aurora shares the same physical interface as higher level switched fabrics such as PCI Express or Serial RapidIO, the protocol is much more lightweight, supporting a multi-lane link between two endpoints without routing or other system-level features. Unfortunately, Aurora by itself does not define enough details to provide an interoperable standard across different vendor implementations, which has resulted in multiple vendor-specific implementations with limited compatibility.

To address this, the VSO recently kicked off a new standard task group, VITA 55, to develop an Aurora-based lightweight protocol and address the interoperability issues. Two implementations of VITA 55 are being standardized: VITA 41.5 for VXS systems to support carrier-to-carrier links and VITA 42.5 for XMC to support mezzanine-to-carrier links. Fabric-agnostic implementations of both VITA 41 and 42 products are expected to support VITA 55 as one option along with existing PCI Express and Serial RapidIO implementations, offering a range of choices to system implementers to tradeoff fabric complexity with FPGA resource utilization.