Next-Generation VME

Next-Generation VME Boosts Defense and Aerospace Applications

With the addition of switched serial fabrics to VMEbus platforms, VXS can provide orders of magnitude more I/O bandwidth than is provided by legacy VMEbus systems.


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Since the turn of the century, it has become clear that the data bandwidth capabilities of parallel multidrop buses such as the VMEbus have been increasingly challenged in data-intensive applications. The result has been the launch of what is called the VME Renaissance—an era of VMEbus innovation and performance improvement while maintaining backward compatibility and protecting existing customer investments—to take VMEbus platforms to the next level of performance.

A series of stages were identified for the VME Renaissance. The goal of the first stage was to bolster the bandwidth capabilities of the multidrop VMEbus, and the goal of the second stage was to add switched serial fabrics to VMEbus platforms. The first stage came to fruition in August 2004 with the release of the Tundra TSi148 PCI-X-to-VMEbus bridge chip, which was co-developed with Motorola. The TSi148 implements the 2eSST VMEbus protocol, where “2eSST” stands for two-edge source synchronous transfer. The “source synchronous” part of the name indicates that the transmitter sends data along with a strobe. The “two-edge” portion of the name indicates that transfers are made on both the rising and falling edges of the strobe.

The 2eSST protocol enables products using the TSi148, working in conjunction with Texas Instruments’ SN74VMEH22501 VMEbus transceivers, to provide up 320 Mbytes/s of data bandwidth in properly designed five-row backplanes. This is an 8X increase over the typical 40 Mbyte/s performance of the VME64 protocol. Motorola’s MVME6100 and MVME3100, along with boards from other companies, use the TSi148 and provide a rich ecosystem of 2eSST-enabled products.

A use case example of how 2eSST technology is being considered to improve distributed application performance is the Navy Open Architecture initiative. This initiative has been focused on using Gigabit Ethernet, Data Distribution Service (DDS) and Common Object Request Broker Architecture (CORBA) middleware. 2eSST technology is now being evaluated for this initiative as a high-performance transport that complements Gigabit Ethernet. The next technology beyond 2eSST that could also be leveraged in this initiative is VXS.

VXS – The Second Stage of the Renaissance

The second stage formally began with the formation of the VXS (or VITA 41) working group in the VSO in March 2002. The goals for VXS as outlined at the inception of the working group were to:

• Provide a switched serial interconnect to VMEbus coincident with the VME parallel bus

• Utilize standard open technologies for the switched serial links

• Allow for multiple standard open technologies for the links, but not necessarily at the same time

• Preserve backward compatibility within the VMEbus ecosystem

• Increase the amount of power provided to each VMEbus card

Each of those goals has been achieved through the resultant specifications created by the working group:

VITA 41.0 - VXS Switched Serial Standard (Base Specification)

VITA 41.1 - VXS InfiniBand Protocol Layer Standard

VITA 41.2 – VXS RapidIO Protocol Standard

VITA 41.3 – VXS 1000 Mbit/s Baseband IEEE 802.3 Protocol Layer Standard

VITA 41.4 – VXS PCI Express Protocol Layer Standard

VITA 41.10 – Live Insertion System Requirements for VITA 41 Boards (Trial Use Standard)

VITA 41.11 – VXS Rear Transition Module (RTM) Standard

VITA 41.0-2 and 10 are currently moving toward ANSI standardization. The remaining standards will move to ANSI standardization in early 2006. These standards provide the framework for VXS implementations throughout the embedded computing industry, and a number of platforms have already been released based on them.

VXS – Data Plane and Control Plane

Now that the evolution and scope of the VXS standards have been characterized, how does VXS take VMEbus platforms to the next level of performance? Before tackling this question, it may be helpful to review the data plane and control plane concepts that are well known in the telecommunications industry. The data plane is defined as the portion of network traffic that is used to distribute data between nodes. The control plane is defined as the portion of network traffic used to set up, maintain and terminate data plane connections.

These concepts also apply to VME applications such as those found in the defense and aerospace markets. In legacy VMEbus systems, the VMEbus carries both control plane and data plane traffic (Figure 1). The VMEbus has always been well suited to carry control plane traffic, mainly because of its low latency. It also has been adequate to carry data plane traffic, provided that the application bandwidth requirements are less than 40 Mbytes/s (for VME64). However, one of the drawbacks of the VMEbus has been the fact that, since it is a multidrop bus, only one connection between nodes can occur at a time, so the aggregate bandwidth of the VMEbus platform is still only 40 Mbytes/s. The closest thing to multiple connections occurring on the VMEbus is broadcast mode, in which one node sends a message to multiple other nodes simultaneously.

Adding switched serial fabrics to VMEbus platforms, through VXS, overcomes the inadequacies of the VMEbus for data plane traffic in two ways. First, switched fabrics tend to have much higher data bandwidth capabilities than the VMEbus. For example, a 4X PCI Express link has a raw data bandwidth of approximately 2 Gbytes/s, or 1 Gbyte/s [(2.5 Gbit/s x 4)/10] in each direction, compared to the 40 Mbytes/s for the VMEbus. Second, switched fabrics use point-to-point connections, which allow multiple connections to occur simultaneously. As an example, the aggregate bandwidth for a VXS 10-slot system, with 4X PCI Express links between five pairs of cards each exercising a 2 Gbyte/s simultaneous connection per pair, could be as high as 10 Gbytes/s, whereas the aggregate VMEbus bandwidth is still only 40 Mbytes/s.

Thus, VXS preserves the multidrop VMEbus for use in legacy applications, where it functions as both the data and control plane, while also allowing the data and control planes to be split between VMEbus and switched fabrics respectively to address data-intensive applications (Figure 1).

VXS Application Example

Consider as an example a signal processing system implemented using VXS (Figure 2). It consists of a 10-slot VXS chassis and backplane with the VMEbus routed to each slot, as well as a single-star PCI Express fabric routed from the VXS switch card slot to every slot. The chassis is populated with four VXS processor cards, four VXS I/O carriers with a signal processing XMC on each carrier, a VXS storage card, a VXS switch card and an RTM opposite the first VXS processor card. The VXS storage card is used for booting the system and storing configuration data.

The data flow is shown by the red arrows. Sensor data enters the system through the front panel ports of the four signal processor XMC cards (the arrows marked 1) and is preprocessed by the DSP engines on these cards. The preprocessed data is then routed through the VXS I/O carrier cards, across the PCI Express fabric, onto the VXS switch card (arrows marked 2). Note that each of the VXS I/O carrier cards can transfer data at up to 1 Gbyte/s simultaneously. This equates to an aggregate I/O bandwidth of 4 Gbytes/s—two orders of magnitude larger than is achievable with VME64! The data is then parsed by the VXS switch card to the appropriate VXS processor cards for post-processing (arrows marked 3). The first VXS processor card then sends out the processed sensor data to an external workstation for viewing (arrow marked 4).

The instantiation of 2eSST and VXS standards-based COTS technologies in VMEbus platforms brings rich benefits to defense and aerospace applications. 2eSST technology can boost the bandwidth of the legacy VMEbus by up to 8X. These performance increments are especially beneficial for defense and aerospace applications that require systems that are able to capture, process and deliver real-time data for display and control of actuating systems. VXS also allows for flexibility in configuring systems with the right balance of processing power and

I/O ports, because the I/O bandwidth provided by the switched fabric interconnect now allows the system to behave as if it were one large virtual card.

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