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RTEC10 is an index made up of 10 public companies which have revenue that is derived primarily from sales in the embedded sector. The companies are made up of both software and hardware companies being traded on public exchanges.

COMPANY PRICECHANGE
Kontron
7.81
4.577%
Adlink
1.54
2.388%
Advantech
2.32
1.505%
Interphase
1.61
-3.012%
Radisys
9.26
-1.016%
-   Performance Technologies2.100.000%
-   Enea5.630.000%
PLX
3.62
-3.209%
Mercury Computer
11.76
-2.931%
Elma
412.98
-0.476%
HIGH LOW MKT CAP
7.85
7.43
435.04
1.58
1.52
185.11
2.33
2.30
1,198.70
1.70
1.61
11.00
9.41
9.24
223.74
2.102.1023.34
5.635.54101.86
3.74
3.61
134.28
12.17
11.76
279.57
412.98
412.98
94.25
RTEC10 Index: 490.94 (1.11%)
RTEC10 is sponsored by VDC research

SOLUTIONS ENGINEERING

CompactPCI 2.16 and Beyond

Cluster Computing and I/O: What Blade Servers Miss, CompactPCI Can Hit

CompactPCI came into being primarily to solve I/O platform needs back in the mid-1990s, with a single (or sometimes redundant) control processor board connected to many I/O boards. The inventors were focused on industrial automation and control applications, but it soon became clear that this was a good foundation for telecommunications systems.

BOB EHLERS, PERFORMANCE TECHNOLOGIES

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The first blade server was a pre-PICMG 2.16 product, designed to port the CompactPCI form-factor into a blade server architecture. This early predecessor to today’s proprietary blade server architectures was ahead of its time and set the standard for many of the features that are commonplace among blade servers today, including Ethernet switch blades, comprehensive hardware management and processor boards. Shortly after this first blade server hit the market, a variety of server manufacturers announced initiatives to produce their own versions of blade servers, and a new market category was created.

PICMG 2.16 was a bellwether for the migration of application processing into the telecommunications network. With IP available to interconnect I/O and computing/control elements in a system now readily available, CompactPCI became an ideal platform for third-generation networks. Lightweight applications could now be placed on x86, SPARC and PPC, directly adjacent to I/O interconnects such as TDM trunk and line cards, serial cards and DSPs.

Thermal Demands of Computing

Expectations in the market regarding computing architectures have traditionally been driven by Moore’s Law: “Computing capacity (transistors per chip) doubles every couple of years.”

Unfortunately for system designers, the relentless push for greater computing capacity has also resulted in greater heat being concentrated in a much smaller space. As such, a system that was designed to support the thermal demands of a processor two years ago, may deliver less than half of the cooling required by today’s processors (Figure 1).

And this is where the road forks for blade servers and CompactPCI.

The blade server market has, for the most part, taken the approach of accepting the computing architectures as they roll out of the silicon manufacturers. In order to maximize computing performance, they use a single, monolithic processor with the highest density of transistors, the largest amount of internal cache and the fastest clock speed available. If a processor requires more cooling, reduce the number of slots and increase the airflow in the system. This paradigm has worked well, up to this point.

Recently, however, CPU manufacturers have started to run into trouble. Back in December of 2002, Intel’s Andy Grove commented that the end of Moore’s Law might be near, pointing to issues such as power leakage from inactive processors as a significant impairment to continuing on with more dense chips. There could be another approach.

What if processors were slightly less performance-oriented but much more thermally efficient? What if you could put two moderately performing processors into the same thermal envelope where a single monolith processor sits today? What if you could put four or even eight processors in that same space?

CompactPCI systems started as I/O-centric platforms from the beginning and have gradually migrated toward being more compute-intensive. As a result of being used as a computing platform, CompactPCI has suffered from the thermal demands made by computing silicon. It has also suffered from the form- factor itself. The slot pitch, the connectors for power delivery, the power bus and the ability to implement airflow solutions all contribute to a current limitation of about 80W per slot in CompactPCI systems.

Given this limitation, using the traditional approach of more integration and greater heat concentration, it looks like CompactPCI runs out of steam with a single 2GHz x86 processor per slot running at full clock speed with memory and support chips. With this limitation, can CompactPCI be effectively used as a computing platform?

Third-Generation Networks

The advantage that CompactPCI has over blade server architectures, and even over AdvancedTCA, is that it is a much more granular form-factor. The 6U Eurocard design allows for great density of slots (up to 21 across in a standard 19-inch rack). Each slot can have a discrete purpose, allowing for system configurations that incorporate a broad array of functions into a single platform. Blade servers and AdvancedTCA are both larger form-factors that have opted for a reduced slot count in favor of larger board space and/or increased airflow per slot.

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