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EMI/RFI

Making EMI Analysis Part of the Design Process

EMI is a fact of life in any electronic design. Getting a firm handle on EMI conditions means addressing the problem upfront in the design process.

GUY DE BURGH, STAFF ENGINEER, MENTOR GRAPHICS

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Electromagnetic Interference (EMI) is part of every day life. Devices affected by it include just about everything—cell phones, DVD players, wireless Internet, flat panel monitors, radar, GPS, and so on. Every company designing electronic equipment has to pass the FCC emissions standards before the product can be made commercially available. EMI needs to be part of the design process. There are a number of questions to be asked at the outset: How to perform EMI analysis? When, in the design cycle, to perform EMI analysis? How do the results of the EMI analysis get implemented? How does the EMI engineer communicate changes to, say, the layout engineer?

The generic process of designing a board falls into a general flow. Design experts do not focus on EMI while designing the schematic. When they are done, they throw it over the wall to the layout experts, which also do not focus on EMI while routing. Eventually, the board is fabricated in manufacturing and given to the EMC (Electromagnetic Compatibility) expert, who is tasked with trying to fix a finished product, which is very difficult, expensive and time-consuming. Indeed any problems that come up this late in the process may be impossible to fix (Figure 1).

The challenge is finding and fixing EMI problems early in the design cycle. The earlier a problem is identified the easier it is to fix; there are more choices, and it is also less expensive. Every effort should be made to find potential EMI problems in the early design stage.

Analysis Difficult to Interpret

At the end of the design cycle, the finished product is tested to make sure that it passes a radiation limit—or rather radiates less than a threshold, which applies differently to different applications, such as military, industrial and commercial. Figure 2 shows the radiation from a clock net, where the staircase line is an FCC radiation limit. At a certain frequency the radiation exceeding its limit causes a problem. How does the problem get solved since this information does not help the layout engineer? It needs to be interpreted first by an EMI expert.

EMI simulations have been shown to correlate well with controlled EMI measurements, however they rarely predict the exact spectra measured in an EMI test. One reason for this is that EMI measurements are not very repeatable because different test sites give different results. EMI is very sensitive to small electrical and physical details where different cable placement, or temperature, can mean different measurements at the same test site from day to day. In order to get an accurate simulation, designers have to model all of these effects including the complete system from the enclosure to the bond wires in an IC, as they all contribute to the radiation. This is simply too big for today’s computers to solve.

Causes of EMI

To help explain the EMI methodology and design guidelines, some basic EMI concepts need to be reviewed. All time-varying currents in a system, whether intended or not, radiate. To better understand EMI, think in terms of current and frequency, as opposed to voltage and time. Currents radiate more efficiently at higher frequencies and small currents can cause more radiation than large currents. For example, noise currents induced on cables can be very small, but can radiate significantly because the cables make good antennas. Keep in mind that PCB EMI is the source for system-level EMI. Good PCB design is essential for system EMI control.

Of the many EMI mechanisms, PCB EMI is dominated by Differential Mode (DM) radiation while system-level EMI is dominated by Common Mode (CM) radiation. DM radiation results from signal and return current pairs, which are physically close to each other. These differential currents can be large but the phase cancellation effect significantly reduces the radiated field strength. CM radiation results from noise currents leaking out onto cables. These currents can be small but the return path to the source can be huge resulting in a large loop area and radiation.

In the lower frequency range, it is not uncommon that CM currents on cables, although smaller than DM currents on a PCB, radiate more because the product of the cable length and wavelength is typically several orders of magnitude larger than the DM loop area. At higher frequencies, DM radiation becomes more important because it is proportional to the square of the frequency while CM radiation is proportional to the frequency.

Controlling DM and CM

In both DM and CM, the controllable quantities are current and the antenna dimensions. So, to achieve a good EMI design, high-frequency currents and antenna dimensions must be minimized. In DM, as currents radiate more at higher frequencies, the key is to reduce high-frequency differential mode currents and loop areas. In CM, the cable length is not usually something that a designer can control, therefore to reduce CM radiation, the CM current has to be minimized.

Knowing that the ground noise voltage driving CM currents on cables is related to the product of the PCB level differential current and the PCB ground inductance (which is proportional to the loop area), it can be shown that the CM radiation can be suppressed effectively by minimizing Idm (Differential Mode Current) and A (Loop Area). This is the same as what one would do to suppress PCB DM radiation. This is why EMI control at the PCB level is the most effective way to suppress both PCB DM radiation and system-level CM radiation. To reduce EMI, Idm and A must be reduced first.

Design Rules

One definition of a Design Rule Check (DRC) is “an ordinance or regulation that should be followed to insure proper operation of the design according to its specification.” Using this definition, DRCs that conform to minimizing DM current and loop area can be created. Figures 3 and 4 show a couple of examples. In one case a clock net crosses a gap in the return path, causing a large loop area (A), and therefore increased radiation. In the second case, a decoupling capacitor is located too far from the pin. The inductance of the long trace makes the decoupling capacitor ineffective. So high frequency noise on the pin could flow onto the trace and radiate.

When creating these rules it is a good idea to choose them such that they can be implemented by one person. How many rules do you need? If there are too many rules, then one person cannot keep track of them. If there are too few rules, crucial tests are missing. Something on the order of 15-30 rules (as opposed to 100-200) is probably ideal and these rules need to cover the main areas of PCB design as well.

The most important thing to remember is there is no set of rules applicable to every company, or every design for that matter. Designers have to know their design and what the critical areas are. Rules can then be constructed to suit a particular design family. Most users customize their own rules to some degree; where some rules can be global to all designs; others can be specific to a particular design. This EMI design knowledge can now be propagated throughout the whole company so all designers can share the same knowledge. This is a key point. The need for having extended EMI verification time is minimized, since EMI problems are found and fixed earlier in the process. In fact they are fixed while the design is in progress.

How to Implement an EMI Methodology

Let’s concentrate on the Placement and Routing phase since that is where corrections for PCB EMI can be made. The proposal is to add EMI checks in these phases, allowing for flexibility if changes need to be made.

In the old design process the EMI analysis was done right at the very end, if it was done at all. So the placement stage went directly to routing. In the new approach, there is EMI analysis performed at the placement stage. This stage does not go to routing until the placement/EMI analysis loop is successfully completed—in other words, when the placement passes the EMI analysis. An example of EMI analysis at this stage is to place decoupling capacitors close to the power pins of the ICs. So now the routing stage has, as its starting point, a good placement from an EMI point of view. Just like the placement stage, the routing/EMI loop continues until the output passes the EMI analysis.

Helpful Results

To be helpful to an engineer, EMI test results must go beyond what’s useful to an EMI expert. It may say “EMI compliance is missed by so much at a certain frequency,” and while this may help an EMI expert, it does not tell a designer or layout engineer how to fix the board. What is needed is something specific that designers can use to actually adjust structures on the board so theoretical-based rules are not violated. In other words, a clearly stated cause/effect, not EMI specific results, is needed.

In Figures 3 and 4, the problems encountered are illustrated along with the reasons why they are problems and advice on how to solve them is provided. The problem and advice is given in terms that the layout and routing engineers understand. In these examples, Quiet Expert from Mentor Graphics is used.

The highlighted problem on the PCB, the problem and advice, and even some annotation by the user can be saved as an image file (such as JPEG) for later documentation and distribution to the design team. These results can be sent and viewed by multiple members of the design team. The nature of the results is very clear: here is a picture of the problem, the problem has been highlighted, and information on how the problem is to be fixed is given.

Even though EMI is a part of everyday life, there are ways to combat it. As explained earlier, by laying out a PCB properly designers can significantly reduce system EMI. By accomplishing a thorough and comprehensive layout, problems can be identified early in the process, making it the best place to discover potential EMI problems as well as the best place to fix those problems. But this is just part of eliminating EMI. By minimizing Idm and A, designers reduce both Differential and Common Mode radiation, and along with incorporating Design Rule Checks, designers have the quickest, most cost-effective, and most understandable method to solving EMI problems.

Mentor Graphics
Wilsonville, OR.
(503) 685-7000.
[www.mentor.com].