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RTEC10 is an index made up of 10 public companies which have revenue that is derived primarily from sales in the embedded sector. The companies are made up of both software and hardware companies being traded on public exchanges.

COMPANY PRICECHANGE
Kontron
7.81
4.577%
Adlink
1.54
2.388%
Advantech
2.32
1.505%
Interphase
1.61
-3.012%
Radisys
9.26
-1.016%
-   Performance Technologies2.100.000%
-   Enea5.630.000%
PLX
3.62
-3.209%
Mercury Computer
11.76
-2.931%
Elma
412.98
-0.476%
HIGH LOW MKT CAP
7.85
7.43
435.04
1.58
1.52
185.11
2.33
2.30
1,198.70
1.70
1.61
11.00
9.41
9.24
223.74
2.102.1023.34
5.635.54101.86
3.74
3.61
134.28
12.17
11.76
279.57
412.98
412.98
94.25
RTEC10 Index: 490.94 (1.11%)
RTEC10 is sponsored by VDC research

INTERCONNECT STRATEGIES

Designing a Non-Blocking, Multi-Stage Switching Network

Multi-stage switching networks using commercially available crosspoint switch ICs combine a fully non-blocking architecture with true scalability for I/O-intensive design requirements.

JOHN BERGEN, FAIRCHILD SEMICONDUCTOR

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Communication systems designers have often used crossbar-switching schemes in telecommunications, networking, digital signal processing and multi-processing systems. These switching schemes are implemented in many different architectures depending on design requirements, such as the number of signals, predictability of connections and overall system cost. The basic building block in these switching schemes is an M input by N output (M x N) crosspoint switch, which has the ability to spatially connect any one of the M inputs to any one of the N outputs.

In practice, engineers can use crosspoint switches to build a complete switching network, but it is not feasible to fully interconnect every I/O using one enormous crosspoint switch matrix. To solve this problem, designers have turned to using multi-stage switching networks that deliver a fully non-blocking architecture with a reasonable, if not minimal number, of crosspoint switch ICs.

Crosspoint Switch Background

Telecommunication system designers have utilized crossbar switches since they were first implemented as electromechanical assemblies in telephone switching offices in the early 1900s. System designers can construct non-blocking crossbar switch matrices by using crosspoint switch fabric ICs, mostly built in advanced VLSI technology. Similar in concept to their electromechanical predecessors, closing the “switch” at the appropriate crosspoint in the matrix creates a connection between an input and an output. Crosspoint switch matrices are found in a variety of telecommunication systems such as digital cross-connects, media gateways and add-drop multiplexers.

Designers use high-performance crosspoint switches for many reasons. For one, they are non-blocking, ensuring that all inputs can find an uncongested path to an output and erasing the bandwidth limitations of one-at-a-time connections. Additionally, crosspoint switches have the flexibility of connecting any input to any output, and are easily scalable for the construction of larger switches from smaller switch elements. “Rearrangeability” is also a key architectural characteristic that makes crosspoint switches useful. This attribute allows one connection path to be changed without affecting the connections for the other paths.

There are two basic methods to implement crossbar switching arrays in semiconductor devices. Custom ASICs, FPGAs and some standard products often rely on an N-way multiplexer (Figure 1). In this architecture there is a multiplexer at each output port to select data from the input ports. Many semiconductor vendors have built crossbar switch products using this easy-to-understand methodology. However, these devices are limited in terms of architectural flexibility (fixed number of inputs and outputs) and performance, and they are difficult to implement efficiently in silicon.

The other implementation uses a crosspoint array (Figure 2) that has a switching element at each input/output intersection. This method offers a high-density crosspoint array with greater flexibility than traditional crossbar switches. This architecture is not limited with fixed input and output structures as each I/O pin can be configured as either an input or output. This type of implementation makes it feasible to build large switch matrices in a cost-effective manner.

Crosspoint Switch Networks

The ability to construct larger switch networks from smaller switch elements is fundamental to the theory of switching architectures. However, there is a basic limitation to building larger crosspoint switch networks. When the switch fabric is doubled, it requires quadrupling the number of chips. For example, to scale a 64-input by 64-output (64 x 64) switch up to a 128 x 128 switch requires four 64 x 64 switches. As a result, this methodology can become unfeasible because so many devices are needed to build a larger interconnect network.

For example, one way to create larger networks is to cross-couple crosspoint switches in a large single-stage configuration as shown in Figure 3. This arrangement shows four 256 x 256 crosspoint switch ICs combined to make a 512 x 512 crosspoint switch. Any of the 512 signals from the left side can be connected to one (or more) of the 512 signals on the right side. Moreover, the signals on the left and the right can be either an input or an output, in any combination, and the input-to-output delay through the switch is the same as the pin-to-pin delay inside a single IC.

Discuss

  • Rajmir Khan
  • March 02, 2010
  • 5:39pm

thanks alot you have given the enough data about the cross bar switching ... i am again saying thanks you very much .

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