RTC Group, Inc.

VPX and the Brave New World of Flexible Hybrid Backplanes

By: Michael Munroe, Elma Bustronic

VPX offers flexibility in terms of interconnects and topologies to mix and match with legacy boards, which enables the integrator to custom design the interconnects over a hybrid backplane to meet the unique needs of the application–right down to the power requirements.

The VPX backplane architecture represents a major leap forward for system integration flexibility through its support of flexible hybrid configurations. These configurations include flexible topologies, multiple signaling protocols and hybrid core architectures, such as mixed VPX and legacy VME64x configurations, in addition to multiple power choices. Earlier backplane specifications, such as VME, strictly defined slot usage. These previous backplane architectures defined how connector pins would be used by a given board, and how each card slot would be connected to the next card slot. These backplanes limited the system capability because key architectural features were defined rigidly from the start. For example, decisions about system connectivity (how boards are connected to each other) determined a specific interconnect topology. VPX was designed to enable end-users to employ any one or a combination of the popular interconnect topologies in a single backplane to best fit any given application.

The VPX Core standard provides for the development of hybrid backplanes because it is designed to simultaneously support a mix of bus segments. For example, these integrated bus segments can be configured in full mesh, pipeline or single or dual star topologies. It is also permissible to have some slots configured as legacy parallel VME. Of the seven connectors in each slot, numbered 0-6, connectors J1 to J6 may be implemented for either differential signals or single-ended signals. This flexibility allows a user to use exactly as many pins and connection configurations, etc., as are needed for the specific application. VPX defines a standard card layout and standard mechanics, electrical utilities and a range of fabric options but lets system engineers connect the dots between them so as to conform to the exact needs of their application.

The term, “hybrid backplane” typically suggests either bringing together heterogeneous backplane architectures such as fabric-based VPX and parallel VME64x (legacy hybrid), or the mixing and matching of different types of network topologies, such as mesh and stars (hybrid topologies). There are, in fact, four different types of hybrid backplanes. In addition to the hybrid types just mentioned, VPX adds the support of hybrid protocols, which involves mixing different fabrics, for example Serial RapidIO and PCI Express, on different channels or bus segments. It also supports a hybrid power approach that allows the integrator to choose the primary voltage for his application from the choices: 3.3 VDC, 5 VDC, 12 VDC or 48 VDC power. Thus, the VITA 46 (VPX) backplane architecture uniquely embraces all four of these hybrid concepts into a single flexible backplane standard.

Legacy Hybrid

The idea of legacy hybrid has been a familiar one in VME development over the years. For example, in a VXS backplane it is possible to combine side by side, legacy VME64x boards with the 2 mmP0 connector alongside fabric-based boards with the differential Multi-Gig J0 connector. In the legacy VME64x slots, boards such as an SBC could be running StarFabric over the 2 mm HM P0 connector, while other systems could populate the legacy VME64x slots with cards based on Ethernet or Myrinet serial protocols. Either of these legacy choices could be combined with multiple slots of newer VPX fabric cards based on Serial RapidIO. For VPX users, the legacy hybrid approach is a transitional, bridging approach that makes it easier for people to use the available VPX boards immediately by combining them with other existing legacy boards. Some early adopters have expressed an interest for hybrid backplanes with large numbers of legacy slots and smaller numbers of VPX slots, For example, one proposed backplane offers nine slots of legacy VME and three slots of VPX. As more VPX boards become available, it’s expected that the ratio will switch toward more VPX slots and fewer VME.

Implementing legacy hybrid support requires a VPX standard that maps signal locations for parallel address and other system signals required by older VME boards onto one or more VPX slots. These special VPX slots are for cards that are capable of communicating across both a serial VPX protocol as well as the parallel legacy VME protocol. Again it can be noted that not all VPX slots in such a legacy hybrid backplane would be required to support dual architecture cards. Part of the challenge in developing a legacy hybrid VPX/VME backplane involves proper wiring to ensure that electrical signals are assigned to the VPX slot in a way that meets the constraints of signal routing while maintaining signal integrity by keeping sensitive signals away from each other. The backplane in Figure 2 has a single VME slot and it is designed to support a card such as the Curtiss-Wright VPX-185 in slot 1 (Figure 1). Any or all of the VPX slots could be configured in this way, however, there are other uses for the signal positions that this would monopolize.

Hybrid Topologies

Hybrid topologies represent a second type of flexibility that can be provided by a hybrid VPX backplane. Many of the leading vendors of embedded computer boards who collaborated within the VITA 46 Working Group had different fabric interconnect topologies in mind for their markets. Some applications are best served by pipeline architectures, while other types of applications are ideal for mesh topologies. It is not unusual, however, in an ideal system to combine topologies so that one group of cards is connected in a mesh and other groups of cards pass data from one card to another in a straight pipeline. For this reason it was agreed from the very beginning that the VPX backplane would allow system architects to select the ideal mix of topologies. The result is a VPX standard that enables system designers to select a single fabric and topology to address a very specific problem, or use multiple fabrics and topologies as their application may require.

To define the proper usage of a variety of optional topologies and their mixed use, the VITA 46 working group developed specific “dot-specs” that define each supported topology. VITA 46.0 is the base specification and sets the requirements for the backplane’s differential signal assignments and location of channels. It also defines where the (+) and (-) differential pair pins are located for differential pairs, and the location of single-ended signals that are interspersed.

VITA 46.1 defines parallel VME within a VPX slot as discussed earlier. The VITA 46.1 dot-spec allows the integrator to specify how many slots will support the parallel VME signals. All slots and plug-in cards would also conform to the basic requirements of VITA 46.0 as can be seen on the VPX6-185 card in Figure 1, which supports parallel VME signaling as well as Serial RapidIO. Figure 3 shows a 6-slot backplane with a single legacy VME64x slot and five VPX slots.

VITA 46.3, 46.4, 46.5 and 46.6 define the implementation of Serial Rapid IO, PCI Express, HyperTransport, Gigabit Ethernet, 10 Gigabit Ethernet and InfiniBand primary fabrics on VPX respectively. Rapid IO and PCI Express seem to be the most popular thus far. Figure 4 shows a hybrid backplane with three 4-slot Serial RapidIO VPX full mesh clusters as well as three legacy VME64x slots and two GigE switches supporting VITA 46.20. The three full mesh clusters are connected to each other in a ring. In this example, Serial RapidIO clusters B and C are also supported by a VITA 46.20 Gigabit Ethernet control plane. All the slots in cluster A support a parallel VME bus that includes the three legacy slots (1, 2 and 3).

VITA 46.9 defines I/O pin usage for PMC/XMC cards. PMC and XMC sockets enable users to add additional functionality to a base card. While some XMC sockets will not require any backplane I/O, many applications utilizing XMC sockets will use the backplane as an I/O port. For this reason VITA 46.9 defines the signal assignments for various configurations. For instance, a 6U card may have one or two XMC sockets requiring backplane I/O. Another configuration might be one or two PMC sockets. An example of a product that provides increased backplane I/O via two 46.9-compliant PMC/XMC sites is Curtiss-Wright’s VPX6-185 8641-based single board computer.

VITA 46.10 defines the use of rear-transition modules on VPX. This is driven by I/O-intensive applications such as an interface to demanding applications such as medical X-ray processing, storage area networks and antenna arrays.

There are several system functions that would benefit in some cases from having a switched serial fabric for utility functions such as system control, application configuration access or other basic communication needs. To standardize the implementation of a single or dual star control channel VITA 46.20 is being defined.

Standardizing the channel mapping of such a utility channel will allow vendors to offer switch cards to provide this access. One of the popular implementations of this newly proposed standard will be unmanaged 3U and 6U x2 Gigabit Ethernet fabric switches. Figure 3 shows how a 3U Gigabit Ethernet switch can provide control plane support to five other VPX cards.

The VITA 46 dot-specs also enable users to define special electrical requirements for a specific fabric protocol. The dot specifications also define the granularity and flexibility of data channels. For instance, a dot specification can define support for x2, x4, x8 duplex channels and so forth. Limiting support to a smaller set of channel widths would reduce cost. Supporting a wide number of channel widths will increase flexibility.

Although different topologies can be segregated into separate slots, it is also possible to overlay two different topologies within a common board set by assigning specific connector segments to different interconnect topologies. For example, one backplane segment may be designated for a slot-to-slot pipeline topology while another segment supports a distributed mesh for a cell architecture. A single slot might be configured with the specific I/O ports needed for an SBC serving as the system console and other slots might be provided with maximum I/O to multiple XMC sockets.

The user may opt to overlay the entire backplane with a distributed Ethernet star. A 6U VPX slot, which can be viewed as 192 differential pairs, can be divided into 24 duplex x4 channels, or into 48 full duplex x2 channels, or a combination of x2 and x4 channels. Such channel definitions are frequently referred to as thin pipes and fat pipes. Thin pipes could be used for control functions and fat pipes used by application for data transport. The standard core fabric provisioning for a VPX payload slot is four ports of x4 duplex fabric. With regards to fabric channel mapping, the standard core fabric provisioning for a VPX payload slot is four ports of x4 duplex channels.

Flexible Protocols

The concept of flexible protocols goes back to the earliest days of serial fabrics when users realized that a serial channel was essentially fabric-agnostic and could be used for any number of serial protocols. Mixing protocols on a VPX backplane is relatively simple in terms of the electrical requirements, which makes it easy for the backplane manufacturer to address. This is because a differential pair that is good at handling Serial RapidIO, is also ideal for Gigabit Ethernet, PCI Express, InfiniBand, or a SERDES direct protocol such as Aurora.

VPX is flexible enough to support the wide variety of fabrics and the different topologies that they prefer. For example, Ethernet, PCI Express and InfiniBand are typically configured in a centralized topology like star or dual star, while Serial RapidIO and the FPGA protocols Aurora (Xilinx) and Serial Lite (Altera) are frequently configured in mesh environments.

The signaling requirements for different protocols are really electrically identical or nearly identical. VPX provides the bandwidth to support the full range of high-speed protocols. VME has been able to support 10/100 Mbit Ethernet, and with the 2 mm connector, supported 1 GigE. Still, it wasn’t until the high-performance MultiGig connector emerged (which VPX uses) that data rates in excess of 5 Gbits/s, reaching as high as 10 Gbits/s, became practical and achievable.

Flexible protocol backplanes are important because many applications already require two protocols. For example, an FPGA-based system using a board such as a VPX FPGA processor board, will need to have one protocol for passing data between boards in a point-to-point architecture, but you may use other fabric channels for I/O. You may even have an Ethernet channel through which you could initiate processes or reprogram boards. This may sometimes be done through the front panel, but a stand-alone system without an operator present may require a communication card to talk to any one of the cards, which could be done via a star architecture like that defined by VITA 46.20.

To standardize the implementation of all these various fabrics as well as to define how various I/O fabrics are routed out the backplane and the mechanics of rear transition modules, many subsidiary standards have been defined. Table 1 lists all these separate documents.

One type of backplane hybrid that is generally less familiar than those considered above is power flexibility. In a system there may be a mix of cards that have different power requirements. For example, there may be Telco cards that use 48V and other cards that use a vehicular supply of 24V. While topology hybrid design demands the user to consider how the application will use the cards and what the data requirements will be, the power problem is simpler in that the challenge is identifying how much power each board requires. But for the backplane vendor, routing and labeling power connections can be just as complex as the challenge of building a topology hybrid or legacy hybrid backplane.

VPX cards are now starting to emerge from vendors such as Curtiss-Wright, Micro Memory, GE Fanuc/Radstone and Mercury. While in the past standard backplanes were available before the cards were developed; today, because of all the flexibility that VPX brings in terms of protocols and topologies, backplane vendors are waiting to see what board connectivity board vendors are going to offer, and some board vendors are waiting to see what preferences are going to be popular with customers. Regardless of the final system requirements, it is likely that laboratory development will take place on standard configurations such as the 5-slot mesh backplane example found in chapter 7 of the VITA 46.0 document.

Elma Bustronic
Fremont, CA.
(510) 490-7388.

© 2009 RTC Group, Inc., 905 Calle Amanecer, Suite 250, San Clemente, CA 92673