By: Stewart Dewar, Curtiss-Wright Controls Embedded Computing, Chair VITA 46 Working Group
The proposed new standard departs from VITA 46 to support high-speed, high-density I/O, yet includes strategies for support of legacy technology.
The complexity and connectivity requirements of today’s VMEbus single board computers (SBC) and high-density digital signal processing (DSP) products are, at last, taxing the limits of the current VME64 standards. This is hardly surprising considering the explosive growth of performance and functionality that is now possible to cram onto the Eurocard form-factor. Considerable credit must go to the originators of VME to have had the foresight to develop standards with such longevity that they could continuously evolve and be improved to remain current and appropriate for so long.The major factor precipitating change is the introduction of high-frequency signaling for the next generation of switched fabrics. In addition to these fabrics, the same physical and electrical signaling will be used for the distribution of high-resolution digital video from sensors such as radar and sonar to a mission computing system where they might be scaled and combined with synthetic graphics for display for a console operator or pilot. The existing connectors run out of steam at 1 GHz, yet the new fabrics require 2.5 GHz or more.
A further consideration for defense and aerospace applications is the use of backplane-only I/O connectivity. This offers many benefits to the system designer and end-user through enhanced reliability and space-efficient routing of I/O signals via the backplane. It also eliminates the possibility of erroneous reconnection of front panel cables during maintenance.
However, the total number of signal pins available on the P0, P1 and P2 connectors of a 6U VMEbus card is limited to 335 pins. This is no longer enough to support all the I/O functionality possible on a typical SBC with two 1 Gbit Ethernets, SCSI, six serial channels, VMEbus interface, two USB ports, Firewire, two PMC/XMC sites with backplane I/O and 14 or more bits of digital I/O.
VITA 46 Working Group
These are just some of the issues that prompted the formation of the VITA 46 Working Group in mid-2002. It was recognized that changes were becoming necessary to the existing VME standards, so a Working Group, formed from VME vendors, connector and backplane vendors and VME integrators and end-users, was convened to begin the collaborative process of developing a new standard. The membership of the VITA 46 Working Group includes: Curtiss-Wright Controls Embedded Computing (CWCEC), Mercury Computer Systems, Radstone Technology, SBS Technologies, Sky Computers, Tyco Electronics, FCI, Bustronic, Hybricon Corp., Pentair/Schroff, Boeing and Naval Surface Warfare Center. The Working Group follows the procedures and balloting process set out by the VITA Standards Organization (VSO) so that VITA 46 will become an accredited ANSI standard once approved.
VITA 46 Objectives
In order to give VME a new 21st century lease of life for defense and aerospace applications, the VITA 46 Working Group determined the following objectives for the future standard:
• The need to accommodate a variety of very high-speed switched fabric architectures such as 1G/10G Ethernet, Advanced Switching Interconnect (ASI), RapidIO, PCI Express, InfiniBand, StarFabric, etc. The standard would support either distributed or centralized switching within the VME chassis with up to four fabric ports per card slot and provide for growth and signal integrity for future speed bumps.
• Support extensively enhanced number of backplane connections of I/O for compact chassis size and maintainability in ruggedized applications.
• Maintain compatibility with existing PMC/XMC modules plus their mounting and cooling interfaces.
• Support for high-speed signaling between the backplane and high-speed connectors on PMC/XMC modules for:
- PMCs for high-speed analog signal capture—direct IF to the PMC through the backplane for DSP applications such as digital radio and signals intelligence.
- Support of high-resolution digital video I/O, mixing and switching from PMC and VME cards.
• Support for more high-speed I/O functionality on the basecard of next-generation SBCs, such as: Ultra-SCSI, Fibre Channel, SerialATA, Firewire, etc.
• Extended support for general-purpose I/O signal lines for serial channels, status signals, USB, MIL-STD-1553B, etc.
• Support for the VMEbus, including ANSI/VITA 1.5 (VME320) to provide continued compatibility with existing product lines and legacy systems.
• Support for a backplane PCI/PCI-X bus to increase system I/O functionality through the addition of PMC carrier cards.
• Alignment and keying of the connectors to prevent damage when mating and to prevent the inadvertent insertion of a board into the wrong slot.
• ESD protection of the connectors for 2 level maintenance applications with provision for the addition of top and bottom cover plates to the card for complete protection.
• Support for 6U or 3U card sizes on existing 0.8” pitch for chassis level compatibility.
• Support for both air and conduction cooling of boards to existing IEEE 1101.10 and IEEE 1101.2 standards.• Interoperability with VME64 and VITA 41 cards in the same chassis.
Although VITA 46 is being developed by a working group comprised of primarily defense and aerospace companies, the standard is equally applicable to commercial and industrial applications of VME, where backplane I/O is an imperative or where the system complexity is such that VITA 46 offers the best technical, reliability and cost-effective solution.
Working Group Status
A draft VITA 46 standard has been published and is available to all VITA members for review at www.vita.com. The balloting process is about to begin which will give the broader VITA membership an opportunity to review and make comments on the draft. The balloting process requires that the WG addresses all comments returned during the ballot before it can proceed to the next phase of development of the standard. With such revolutionary changes being proposed by VITA 46, the standard will require extensive evaluation and testing before any new products can be released to market. Members have committed to a shared-cost test plan to make a very full evaluation of environmental performance to ensure reliable operation in the most severe military environments. Eight test articles have been produced to support the test plan that will be performed by Contech Research. In addition to the environmental test plan, other plans are being formulated to assess backplane performance and routability to make the most effective allocation of connector signal pins to all the functional requirements.
VITA 46 Advanced Module Format
Meeting all of the objectives of VITA 46 and still offering growth potential for the future revolves around the backplane connectors. Neither the P1/P2 nor P0 connectors support 2.5 GHz signaling nor do they have enough signal pins to meet anticipated future requirements anyway. Changing just part of the connector was not enough, so the decision was made to use the Tyco/FCI MultigigRT series connector throughout. This connector is modular and built from a series of wafers, which are available in different types: differential pairs rated to 6.25 GHz, single-ended and power. In VITA 46 form, 7-row wafers are used. The wafers are provided with their own ESD ground plane and contact layout to prevent accidental discharge during handling.
In all, the new connectors include a power/utility section that provides for connection of 24A of primary power to the module (120 Watts at +5V). They also provide for system management functions such as reset, power for system management, geographical addressing, IPMI functionality and a 1 Gbit/s Ethernet port for software development and download. In addition to 48 single-ended signals, 192 differential pairs can also be used as single-ended signals, giving 384 such signal lines if no high-speed signaling is required.
The fundamental change for VITA 46, then, is to the connectors, making the new standard appear at first sight to be incompatible with current VME64 products. This, of course, is true, but closer examination reveals the amount of thought that has gone into the maintenance of a typical project’s development and deployable infrastructure, while providing the framework for the adoption of so many new features and capabilities. This can be illustrated by considering an existing project based around VME64 where we would want to swap out its existing PowerPC SBC to take advantage of a new switched fabric being introduced into the system or to combat obsolescence. A typical subsystem could be one with 5 or 6 cards in a chassis forming part of a much larger integrated system.
In this case, the existing development and deployable chassis can be reused. VITA 46 products will comply with current 3U and 6U form-factors and environmental standards, the only exception being at the interface to the backplane. There would be no need to re-characterize at the subsystem level or to undertake an expensive re-qualification exercise.
Here, we would replace backplanes in development and deployable chassis with hybrid backplanes containing one VITA 46 slot for the new SBC and VME64 slots for the remainder of the subsystem. VITA 46 maintains compatibility with existing power supply standards so no replacement is required. We would then hook up the backplane to existing external interfaces and create new interfaces for the switched fabric. An example of a hybrid backplane is shown in Figure 1.
The existing PMC or PMC/XMC modules on the SBC can be reused with no change. There is also no change needed to the software development environment or real-time operating system other than the introduction of a new board support package (BSP) for the new SBC. Recompilation and regression testing of the existing application software will have to be done in any event when an SBC was replaced.
The 3U VME format is also addressed by VITA 46 giving it a new lease on life in potential conduction-cooled and rugged applications where backplane I/O is mandated. The MultigigRT connector will, in this case, support 80 differential pairs plus a further 20 single-signal pins. This will be enough for useful functionality through the backplane to support a single PMC/XMC site on a 3U single board computer offering high-speed switched fabric connectivity as well.
Benefits for a Typical Application
The software radio application illustrated in Figure 2 is an example of future system needs that will be satisfied by switched fabrics, in this case ASI. Multiple voice or data channels are handled by high-speed A to D receivers on PMC/XMC modules; quad PowerPC DSP cards filter and demultiplex the data and the overall system is managed by two SBCs providing summary results to a mission system via MIL-STD-1553B.
This is a good example of where distributed switching is advantageous compared to the centralized switching scheme proposed by, for example, VITA 41. Each of the VITA 46 modules has an embedded switch giving four external ports—there will be a number of internal ports as well. Two of the external ports from each module are used to provide a continuous loop between all of the modules, offering similar functionality to a centralized switch. However, other ports provide dedicated pathways from module to module to act as big “data pipes” when the need arises.
Distributed switching in this example provides great flexibility to the system designer. The application does not depend on the aggregate throughput of a centralized switch and has some ability to recover its functionality in the case of a data path failure. This need for distributed switching is recognized in VITA 46 by the allocation of four basecard fabric ports in the mapping of the new connector functionality. In addition to the four fabric ports per module, this example also illustrates the need for high frequency signaling between the backplane and the digital receiver A to Ds, probably mapped via the XMC connectors.
VITA 46 Advanced Module Format
The new Advanced Module Format is illustrated by the photograph of an engineering test assembly. This is representative of a 6U conduction-cooled VMEbus single board computer (SBC) with two conduction-cooled PMC sites. The new MultigigRT connectors are the most obvious feature and offer 192 differential pairs plus 48 single-ended signals or a total of 432 single-ended signals, still fi tting within the existing 0.8” card pitch and compatible with IEEE 1101.2 for use within existing ATR-type conduction-cooled enclosures. The connectors’ small size also permits the retention of the existing stiffening rib next to the connectors themselves. This rib prevents relative movement between the two mated halves of the connector during high levels of vibration, eliminating fretting of the mating sur faces. In addition, the photograph illustrates the following:
• Connector alignment and keying. The three metallic receptacles at the connector end of the board accept guidepins mounted in the backplane. The guidepins ensure mechanical alignment of the connectors during mating and have keying fl ats on the pins. These mate with corresponding fl ats in the receptacles to provide a positive keying mechanism. No signal connections are made until the connectors are aligned and the keying is correct.
• Two PMC sites. Conduction-cooled PMCs are attached to the basecard’s frame at the regular fi xing points, also making thermal contact along the designated thermal inter faces between the PMC’s thermal frame and the basecard. VITA 46 is totally compatible with the existing VITA 20 standard for conduction-cooled PMC/XMC modules. • Wedgelocks fi tted along the two shorter sides of the board. These are used to make the thermal and mechanical inter face between the board and its mounting enclosure. The wedgelocks and their corresponding enclosure slot dimensions are unchanged.
A complete VITA 46 VMEbus card is illustrated in the sidebar, p25. The connector is made up of seven blocks numbered from P0 to P6. P0 has been designated the Utility Connector and is half the length of the other blocks. Of the remainder, all are fitted with differential wafers except for P2, which is populated with single-ended wafers. P2 is mapped to all the basic VMEbus signals with the exception of D16 to D23 and D24 to D31, which are mapped to P3 and P4 respectively. These signals are found on the VME64 P2 connector, thus reducing routing length between slots in new hybrid backplanes. The proposed routing as shown in Figure 3, shows the following:
• Basecard switched fabric connections on P1. Thirty-two pairs giving four fabric ports for ASI, RapidIO or StarFabric.
• PMC I/O offering 64 signal lines to each PMC site mapped to P3 and P5 respectively.
• Eight pairs for each XMC connection, enabling high-speed ports such as PCI Express from the PMC/XMC sites.
• A further 104 signal pins for basecard I/O, 48 of which may be differential pairs. On a typical SBC these would be allocated to multiple serial channels, SCSI, Ethernets, Firewire, USB, digital I/O, etc. In the case of a DSP card these may be further switched fabric connections or high-speed data ports such as PCI Express.
VITA 46 has the support of an aggressive, competitive industrial base that is expected to announce a number of new products during 2005. The hybrid backplane approach will be key to economically sustaining legacy VME systems while at the same time introducing the latest switched fabric technologies. However, over time, the hybrid approach will become less popular for new system designs as SBCs will continue to become ever-more complex, as will DSP systems with their sophisticated fabric topologies interconnecting High Density Computing Modules and FPGA-based front-ends.
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